Cadence Design Systems (Nasdaq: CDNS) has unveiled the Tensilica HiFi iQ DSP, the sixth generation of its HiFi digital signal processor family, positioning the new IP as a purpose-built platform for next-generation voice AI and immersive audio applications. The announcement reflects growing demand for higher on-device computation across consumer, automotive, and mobile markets, where audio and voice interfaces are becoming central to user interaction.
The HiFi iQ DSP is based on a new architecture developed to address the increasing complexity of AI-enhanced audio workloads. Cadence said the processor delivers twice the raw compute performance and eight times the AI performance of its predecessor, the Tensilica HiFi 5s DSP, while also achieving more than 25% energy savings across most workloads. In practical terms, the company reported performance gains exceeding 40% on a range of widely used audio codecs.
These improvements come as system-on-chip (SoC) designers face growing pressure to support richer audio experiences and more advanced voice processing without increasing power consumption. Applications such as immersive and object-based audio, higher sampling rates, natural language processing, and automotive road-noise cancellation are driving the need for greater computational density. At the same time, many edge and automotive platforms are power constrained, limiting the feasibility of simply raising clock speeds or adding more cores.
Cadence said it drew on more than two decades of experience in audio DSP design and instruction-set optimization to create an architecture optimized for AI-enhanced audio processing. The HiFi iQ DSP introduces enhanced auto-vectorization to simplify programming and reduce development time. It also integrates native support for modern numerical formats such as FP8 and BF16, enabling more efficient execution of current voice AI models.
According to the company, the DSP’s expanded capabilities allow advanced immersive audio codecs—including Dolby MS12, Eclipsa Audio, Opus HD, and Audio Vivid—to run more efficiently than on previous HiFi generations. Beyond codec acceleration, the processor is designed to handle signal processing tasks such as keyword spotting, active noise cancellation, beamforming, and automatic speech recognition, supporting more natural and responsive voice interfaces.
Multi-stream and multi-channel audio processing is another focus area. The HiFi iQ DSP supports complex playback scenarios, including 3D spatial audio zones and sound “bubbles,” which are increasingly used in automotive infotainment systems and premium home entertainment products. Cadence said these features enable more realistic and immersive listening experiences while maintaining low latency.
Industry analysts see the shift toward voice-driven interfaces as a key driver for this class of processor. Anshel Sag, vice president and principal analyst at Moor Insights and Strategy, noted that audio and language are becoming critical user interfaces as AI adoption accelerates. He said the combination of AI performance and energy efficiency positions the HiFi iQ DSP to offload workloads from other processing blocks within SoCs.
Cadence emphasized that the HiFi iQ DSP is capable of running both small language models (SLMs) and large language models (LLMs) directly on the DSP, allowing it to function as a standalone AI processor for voice-centric applications. For higher performance requirements, the DSP can be paired with Cadence’s Neo NPUs or with custom neural processing units designed by customers.
On the software side, the processor is compatible with Cadence’s NeuroWeave SDK and supports popular AI frameworks including TensorFlow Lite for Micro, LiteRT, and ExecuTorch. Cadence also highlighted its established ecosystem of partners and OEMs, which provides access to software libraries, compilers, codec packages, and development frameworks intended to accelerate deployment.
The Tensilica HiFi iQ DSP is scheduled to be available to lead customers and partners in the first quarter of 2026, with broader availability expected in the following quarter. Cadence said the processor is being developed with ISO 26262 functional safety certification in mind, making it suitable for safety-critical automotive applications. Support for cache-coherent multicore configurations is planned in future iterations.
