India has set an ambitious target to achieve domestic 3nm chip manufacturing by 2032, marking a significant escalation of its semiconductor self-reliance strategy amid surging global demand for advanced chips. Union Minister for Electronics and Information Technology Ashwini Vaishnaw outlined the roadmap during a review meeting with Design Linked Incentive (DLI) 1.0 startups on January 27, 2026, in New Delhi.
Vaishnaw said India aims to design and manufacture chips meeting 70–75% of its domestic requirements by 2029, with capabilities advancing to 3nm by 2032 and further to 2nm thereafter as part of the government’s Semicon India Programme 2.0. He also reiterated the goal of positioning India as a top-four semiconductor manufacturing nation by 2032 and the world’s leading producer by 2035, while capturing nearly 50% of global chip design work.
The review meeting assessed progress across 24 startups supported under the DLI scheme. According to the minister, 16 of these firms have already completed tape-outs, including some at advanced nodes such as 12nm, and 14 have secured venture capital funding. The startups are working across areas including compute, radio frequency (RF), and artificial intelligence chips, underscoring growing depth in India’s fabless ecosystem.
Vaishnaw highlighted successful tape-outs at government-backed Semiconductor Laboratory (SCL) Mohali, currently operating at 180nm, as well as progress at the upcoming Dholera fabrication facility, which is expected to support nodes down to 28nm in its initial phase. He said these developments validate the DLI framework’s ability to translate design activity into market-ready products.
India’s broader semiconductor roadmap envisions achieving 7nm manufacturing capability by 2030, before moving to 3nm by 2032 and 2nm by 2035. The upcoming DLI Phase 2 will expand support to more than 50 fabless firms, focusing on six chip categories: compute, RF, networking, power, sensors, and memory. Vaishnaw also announced the launch of Deep Tech Awards in 2026 to further incentivize innovation.
On the design front, India inaugurated its first 3nm chip design centers in Noida and Bengaluru in May 2025, led by Renesas Electronics India. These facilities enable end-to-end 3nm design and build on earlier achievements at 5nm and 7nm. More than 270 academic institutions have also been equipped with electronic design automation tools and training kits to support workforce development.
Manufacturing investments remain central to the strategy. Tata Electronics’ Rs 91,000 crore Dholera fab in Gujarat, developed with Taiwan’s Powerchip Semiconductor Manufacturing Corp and a U.S. partner, is expected to begin commercial operations by FY 2029–30. Combined with projects from Micron, CG Power, Foxconn, and Kaynes, total approved semiconductor investments now exceed Rs 1 lakh crore, positioning India to play a larger role in a global market projected to reach $1 trillion by 2026.
