FuriosaAI has announced a strategic partnership with Broadcom (NASDAQ: AVGO) to develop a next-generation AI inference platform designed for large-scale agentic AI deployments in hyperscale data center environments.
The collaboration will focus on FuriosaAI’s third-generation AI accelerator platform, combining the company’s Tensor Contraction Processor (TCP) architecture and software stack with Broadcom’s AI networking and scale-up infrastructure technologies.
According to the companies, the partnership moves beyond a conventional ASIC engagement and aims to build a rack-scale inference platform optimized for frontier AI systems and high-volume token processing workloads.
The new platform builds on FuriosaAI’s existing RNGD data center inference chip, which is currently in mass production using TSMC’s 5nm process technology.
RNGD is a 180W PCIe-based AI accelerator designed for large language model (LLM) and agentic AI workloads. The company said the chip has already been validated in production environments by organizations including Samsung SDS and LG AI Research.
FuriosaAI stated that the TCP architecture focuses on efficient data reuse and communication optimization, helping improve throughput and latency while operating within lower power envelopes.
The third-generation platform will feature a 2nm compute die, a dedicated I/O die for scale-up networking, and HBM4 and HBM4E memory technologies. The companies said Broadcom’s advanced packaging capabilities will support integration of multiple silicon dies into a unified AI inference accelerator platform.
The system will also incorporate Broadcom’s scale-up Ethernet technologies to enable low-latency and high-bandwidth interconnects across hundreds of AI chips at rack scale.
Charlie Kawwas said large-scale AI inference performance increasingly depends on efficient communication and data movement across servers and racks rather than raw compute alone.
According to the companies, the platform is designed to support demanding AI workloads including post-training sampling and large-scale inference operations. FuriosaAI said its architecture emphasizes high-bandwidth data movement over traditional GPU thread management approaches to improve performance-per-watt and token density.
The company also highlighted its software stack, which includes a compiler-based SDK capable of automatically mapping high-level PyTorch code to hardware. FuriosaAI added that its Virtual ISA framework allows developers to access lower-level hardware control without the complexity associated with GPU kernel programming.
June Paik said the partnership would help accelerate development of infrastructure for large-scale AI deployments and next-generation agentic workloads.
Sampling of the third-generation AI accelerator platform is scheduled to begin in the first half of 2028, according to the companies.
