The race to build alternative AI accelerators is increasingly shifting beyond chip design, with software compatibility emerging as a major hurdle to commercial deployment. Infinity, an AI infrastructure research company, has outlined a case study showing how agentic software tools were used to prepare d-Matrix’s Corsair inference accelerator for AI workloads.
The work centres on Infinity’s Ignition system, an autonomous research and tool-building agent designed to generate and test low-level compute kernels, compilers, profilers, debuggers and software development kits. The companies said the tools helped get models running on production-ready Corsair hardware within days.
The challenge reflects a broader issue in the AI semiconductor market. New accelerator architectures can offer different approaches to computing, memory and power efficiency, but customers also need software tools capable of translating AI models into efficient workloads. Nvidia (NASDAQ: NVDA), for example, has spent years developing CUDA and its surrounding software ecosystem, which has become a key part of its position in AI computing.
For the Corsair project, Infinity and d-Matrix worked on running Qwen3, a large language model, on an architecture that differs substantially from conventional GPU systems. Corsair uses on-chip SRAM to keep computing resources close to data, reducing reliance on external memory bandwidth.
This required the model to be mapped across multiple levels of Corsair’s architecture, including chiplets, gangs, slices, cores and SRAM banks. The companies used several forms of parallelism to distribute the workload.
Pipeline parallelism was applied across the card’s two packages, while tensor parallelism distributed dense computational operations across 16 hardware gangs. Attention heads were assigned to individual gangs to minimise communication between them. Batch parallelism was used to isolate each sequence’s key-value cache and state across dedicated slices.
Memory management was another part of the optimisation process. Since Corsair’s SRAM can retain weights during both the prefill and decode stages of inference, the teams used lifetime tracking to keep frequently accessed parameters in place while recycling temporary activation memory.
Infinity said its optimisation process incorporated hardware probing and profiling to measure instruction costs and memory behaviour on the accelerator. Its MemoryScope compiler then searched for suitable memory placements and parallelism configurations based on capacity, locality and data lifetime.
A Graph and Memory Sanitizer was used to identify memory-related errors before execution, while an agentic debugging system examined model execution during loading, prefill and decode stages to locate numerical problems.
The case study comes as AI inference workloads expand and chipmakers seek alternatives to general-purpose GPUs. Purpose-built accelerators can be designed around specific workload characteristics, but their adoption can depend heavily on the availability of compilers, kernels and other software required to run models efficiently.
Jeremy Nixon, founder and CEO of Infinity, said the company developed a substantial part of what he described as an alternative software layer to CUDA within weeks, while the tooling created during the process could subsequently be applied to other hardware-development projects.
Sid Sheth, founder and CEO of d-Matrix, said models were running on production-ready Corsair hardware within days of the collaboration.
