proteanTecs and MegaChips are collaborating to integrate embedded monitoring technology into next-generation ASIC and LSI digital systems, targeting greater visibility into chip health, performance and reliability.
The companies said the collaboration will focus on advanced ASIC and LSI designs for AI and high-performance electronic systems, with monitoring capabilities spanning development, production and in-field operation.
Under the agreement, proteanTecs’ on-chip monitoring technology and software analytics will provide MegaChips’ customers with data on actual silicon behavior. The companies said the information can help accelerate chip bring-up, improve power and performance management, and support more predictable operation after deployment.
The collaboration will also include proteanTecs’ AVS Pro application, which is designed to enable dynamic power reduction based on workload conditions.
MegaChips said the technology will complement its existing Design for Test (DFT) capabilities, adding deeper analytics to conventional testing processes.
“We are delighted to enter into this MOU with proteanTecs,” said Yasushi Amamiya, Executive Officer and Senior General Manager of Hardware Div.1 at MegaChips. He said the collaboration could help customers gain greater insight into device behavior under real workloads and operating conditions.
The companies are targeting applications where rising computational demands are increasing pressure on semiconductor designers to balance performance, power consumption and reliability.
AI and edge-computing systems, in particular, require chips to operate efficiently under changing workloads. Monitoring silicon behavior during actual operation can provide design teams with information that may not be available through conventional testing alone.
For MegaChips, the partnership is also intended to strengthen its ASIC design services by providing customers with additional data throughout the chip lifecycle. The companies said this could help reduce development risks and accelerate time to market.
Nori Kojima, General Manager of proteanTecs Japan, said MegaChips’ more than three decades of experience in system LSI development, including ASIC, ASSP and module solutions, would complement proteanTecs’ monitoring and analytics technology.
The companies said access to real-time or lifecycle silicon data can help designers optimize devices against power, performance and thermal requirements while improving yield and reliability.
The collaboration will extend to advanced ASIC and Co-Packaged Optics (CPO) designs, where increasing system complexity is placing greater emphasis on monitoring and reliability across the product lifecycle.
CPO architectures integrate optical and electronic components more closely to address bandwidth and energy-efficiency requirements in high-performance computing and AI infrastructure. Such designs can introduce additional thermal and operational considerations, increasing the value of detailed information about device behavior.
The partnership is expected to establish a framework for lifecycle monitoring, yield optimization and reliability management across development, manufacturing and deployment.
