Cadence Design Systems (Nasdaq: CDNS) and Samsung Electronics have expanded their collaboration around second-generation 2nm process technology and 3D IC design, targeting growing demand for AI infrastructure and physical AI systems.
The companies announced a multi-year agreement covering advanced memory and interface IP, as well as expanded certification of Cadence’s AI-driven electronic design automation (EDA) and system design and analysis flows for Samsung Foundry’s second-generation 2nm node.
The collaboration aims to provide semiconductor companies with a signoff-ready platform for developing next-generation AI, high-performance computing (HPC), edge computing, and intelligent device applications.
According to the companies, the expanded partnership builds on earlier certified Cadence tools and IP offerings announced in 2025 across several Samsung Foundry process nodes.
Under the agreement, Cadence will broaden its portfolio of memory and interface IP, including NVIDIA NVLink-C2C-enabled interconnect technologies and CUDA-X GPU-accelerated libraries. The portfolio also covers high-speed SerDes, PCIe, UCIe, and leading memory interface technologies designed for advanced AI and HPC workloads.
The collaboration also expands support for advanced-node and 3D IC design flows. Cadence said its platform includes the Innovus Implementation System for digital implementation, Virtuoso Studio for analog and custom design, Integrity 3D IC Platform for 3D system planning, Voltus IC Power Integrity Solution, Quantus Extraction Solution, and Tempus Timing Solution for signoff verification.
The companies stated that the platform is intended to improve performance, lower power consumption, and accelerate time-to-tapeout for increasingly complex semiconductor designs.
Boyd Phelps said AI infrastructure and physical AI applications are driving demand for more advanced node technologies and 3D IC architectures that require higher integration and verification confidence.
Jongshin Shin said customers are increasingly adopting Samsung Foundry’s second-generation 2nm technology for advanced AI workloads and emerging physical AI applications.
The companies also highlighted collaboration with NVIDIA around NVLink-C2C interconnect technologies and GPU-accelerated design flows for next-generation AI systems.
Timothy Costa said growing AI workload complexity is increasing demand for advanced semiconductor design platforms capable of supporting high-bandwidth interconnect and accelerated computing architectures.
In addition, Ambarella is using the platform for development of its next-generation 2nm edge AI systems focused on robotics, drones, autonomous machines, and intelligent sensing applications.
Chan Lee said the collaboration supports development of low-power AI perception and physical AI systems while helping reduce design and manufacturing complexity at advanced semiconductor nodes.
