Taiwan Semiconductor Manufacturing Co. (NYSE: TSM), the world’s largest contract chipmaker, plans to manufacture 3-nanometer logic chips at its second factory in Japan after the country’s Ministry of Economy, Trade and Industry (METI) approved a revised production plan on October 16.
The facility, operated by TSMC-controlled Japan Advanced Semiconductor Manufacturing (JASM) in Kikuyo, Kumamoto Prefecture, is expected to begin production in December 2028. The revised plan replaces an earlier roadmap focused on 12nm and 6nm chips, positioning the factory to become Japan’s first capable of manufacturing 3nm logic semiconductors.
TSMC confirmed the revised direction in a post on X on October 20, saying production and investment would be implemented in phases according to market demand and with Japanese government support.
Initial production capacity is planned at 6,000 300mm wafers per month, down from approximately 48,000 wafers per month under the earlier plan for the second factory. The new capacity reflects a substantially different production configuration, although TSMC has not publicly detailed the factors behind the reduction.
Investment exceeds $23 billion
Total investment across the JASM venture’s two factories is expected to exceed $23 billion, according to reports following the revised plan. The figure covers the broader venture rather than the second factory alone. TSMC has said the project will help meet growing demand for advanced chips, particularly for artificial intelligence applications.
Japan is also expected to provide substantial financial support. DigiTimes reported that the revised project could qualify for up to $4.1 billion in government aid. The final support arrangements and their relationship to the revised investment plan have not been fully detailed publicly.
The phased investment approach ties the project’s development to demand and government support. That gives TSMC flexibility to adjust implementation as customer requirements and manufacturing plans evolve.
Japan seeks access to advanced chipmaking
The revised plan strengthens Japan’s effort to expand domestic semiconductor manufacturing and reduce reliance on overseas production for strategically important technologies. The country has been investing in chipmaking capacity to support its electronics, automotive and industrial sectors and improve supply-chain resilience.
A domestic 3nm production facility would give Japanese customers access to advanced logic manufacturing within the country. The technology is relevant to high-performance computing and AI processors, although TSMC has not disclosed a detailed customer list for the Kumamoto factory.
The project also extends TSMC’s manufacturing footprint beyond Taiwan. The company is expanding production in multiple markets while continuing to invest in its home operations, where it maintains a substantial share of its advanced manufacturing capacity.
In February 2026, TSMC signalled its intention to bring 3nm production to the second Kumamoto factory. The October approval formalizes the revised production plan and establishes a clearer path toward the targeted 2028 start.
Production timeline remains demand-dependent
The planned December 2028 start will depend on execution of the construction and manufacturing program, while subsequent investment and production levels will be implemented in phases.
The initial 6,000-wafer monthly capacity is considerably smaller than the earlier plan, underscoring the change in the factory’s intended role. TSMC has not announced when or whether capacity will expand beyond that initial level.
